As is known and illustrated in FIG. 1, a flash memory array 1 comprises a plurality of cells 2 arranged on rows and columns. The gate terminals of the cells arranged on a same row are connected to a respective word line 3, and the drain terminals of the cells belonging to a same column are connected to a respective bit line 4. The word lines 3 are connected to a row decoder 5, and the bit lines 4 are connected to a column decoder 6. For reading and writing the cells 2, a control unit 7, connected with the decoders 5 and 6, transmits to the decoders address and control signals for selecting, each time, only one word line 3 and one or more bit lines 4. In this way, it is possible to access the cells 2 connected to the selected word line 3 and bit lines 4.
With known programming devices, the cells are programmed by applying to the gate terminals of the selected cells 2 a discrete ramp voltage comprising a series of voltage pulses having a constant preset duration and an amplitude increasing with constant increment, and forcing a high voltage on the drain terminals of the cells 2 (write phase). In these conditions, hot electrons are injected, thereby modifying the threshold voltages V.sub.th of the selected cells 2. In particular, calling .increment..tau. the duration of each pulse and .increment.V the increment between two successive pulses, the mean slope of the ramp is m=.increment.V/.increment..tau..
At equilibrium, the threshold voltage V.sub.th of the cell 2 being programmed increases with a slope equal to the mean slope m, and it is therefore possible to calculate the number of voltage pulses to be applied to the gate terminals of the cells 2 to be programmed to obtain the desired threshold voltage increment. Since, however, hot electron injection is, by its very nature, non-controlled and non-repeatable, at the end of each series of voltage pulses it is necessary to read the reached threshold voltages (verify phase).
Known programming devices have some drawbacks, mainly because the generation of the discrete ramp voltage requires special, quite complex devices. Generally, programming circuits for nonvolatile memory cells use for this purpose an analog/digital power converter (DAC) that must be able to drive the parasitic capacitances associated to the gate terminals of the memory cells 2 to be programmed. In addition, if the duration .increment..tau. chosen for the voltage pulses is lower than the clock period .increment.T of the DAC, each pulse has a dead time of duration .increment.T-.increment..tau..